The objective of this activity is to significantly improve the efficiency of GaN transistor technology. Breadboards of Ka-band highpower (at least 2-5W class) amplifier GaN monolithic microwave integrated circuits (MMICs) for active antenna applications will be designed, manufactured and experimentally tested in a representative operating environment. The concepts developed will be applied toQ- and W-band, bench marked and tested at transistor level.Targeted Improvements: 20%-point improvement of mm-wave (Ka-, Q-, W-band) high power amplifier efficiency over the state of the art, enabling significant reduction of the mass, size and complexity of thermal management systems. Description: ESA member state capability is starting to lag behind worldwide competition for efficient semiconductor high power amplifiers (HPA) for space applications. Improvements are needed at transistor level to achieve higher efficiency amplifiers to be realised in Ka, Q, and W-band. To improve efficiency, the introduction of new device topologies, materials andfabrication techniques is needed to increase the transistor gain bandwidth from tens of GHz to hundreds of GHz. The availability ofhigher frequency performance will allow:- more gain margin, allowing use of higher-efficiency operating amplifier classes (deep class AB, Class B, etc.),- improved capability to implement waveform shaping at higher order harmonics (60, 90, 120 GHz etc.), also contributing to increasing efficiency, and- shrinking of device lateral dimensions to maximise the RF voltage swing (lower knee voltage), improving efficiency due to reduced resistive losses.Careful material selection for fabrication of the transistor can also allow flattening of the transistor transconductance profile, a major contributor to distortion, thus improving noise power ratio performance. Improving transistor linearity will require less HPA output power back-off, also contributing to an overall efficiency improvement.This activity will increase the transistor gain bandwidth from typically 80 - 90 GHz (current situation) to 250 GHz or higher, whilst maintaining a breakdown voltage of at least 50 V. This will allow mm-wave HPA MMICs to reach 20% improvement in efficiency compared to the current state of the art. The activity will: - design, manufacture and test devices with a gate length not larger than 100 nm,- optimise the transistor layout to reduce parasitic inductance and increase the gain at mm-wave frequencies,- use new materials (e.g. AlN, ScAlN, multiple 2-deg. channels) to realise a thin transistor channel with low parasitics and high saturated electron velocity,- use new device concepts (e.g. 3D buried gate structures),all aimed at improving transistor performance (power density, efficiency, linearity, breakdown voltage). Space environmental compatibility will be considered at the transistor process development stage.