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This study fits into an overall strategic plan to establish linearised amplifier products that have applications in larger systems as well as being ‘stand-alone’ developments. The study will review three candidate linearising techniques which can be subsequently used in the development of a standalone, linearised High Power Amplifier (HPA) for the AVSAT terminals market.
The study is the ARTES 5.2 part of the above block diagram which provides the linearising technique to be used in the ARTES 3-4 amplifier development.
CDE will use its GaN PA to determine the characteristics needed by the lineariser. Three candidate techniques have been identified:
The objectives of the study are to:
There are several key issues to be addressed:
CDE has developed a Gallium Nitride-based (GaN) SSPA design which takes advantage of the greater efficiency offered by this new type of semiconductor. With a working prototype already in operation, CDE consider that one of the basic “building blocks” is now close to market.
Exploiting the potential of a GaN-based power amplifier requires that some form of lineariser is included in the amplifier architecture and CDE has, through its own corporate contacts, access to several candidate linearisation approaches.
This proposed ARTES 5.2 development enables CDE to identify the most appropriate linearising technique to be used in conjunction with its power amplifier developments. This will result in an innovative range of high efficiency power amplifier products that will principally address terrestrial markets as well as some niche space-borne applications.
The overall architecture is as shown in the “Project Objectives” section above.
There are three sequential work packages:
The project is now finished.
All WP are complete:
In WP1000 a GaN PA module was built to ensure we had a sufficiently reliable unit on which to conduct tests. The PA was characterised for AM-AM and AM-PM. The AM-PM characteristic is not significant (as expected for a GaN PA) and is discounted.
The High Order polynomial function was reviewed in WP2100. Although the techniques look promising and offer much closer curve fitting, the practical and industrial realisation, either at RF or IF requires substantial process development to implement the complexity of ASIC required.
The diode predistorter is a conventional technique and WP2200 used a “standard” implementation as a basis for evaluating the linearised PA. Although cost-effective and implementable in the short term, the performance was marginal some way short of the required output power for the BGAN application. Consultation with the University of Manchester indicates, from further simulation and modelling, that a more complex implementation incorporating circuitry to match pre-distorter and amplifier third order signal levels can generate the required improvements in amplifier efficiency.
WP2300 comprised the review of testing carried out by the Canadian Communication Research Centre (CRC) of a patented digital predistorter and the CDE GaN PA. There is a viable performance improvement through the use of this technique, albeit more complex.
WP3000 summarised the relative merits of the three approaches and concludes that the WP2300 Digital Predistorter and the WP2200 Diode Predistorter, as enhanced by the techniques identified by Uni of Manchester, are suitable for incorporation in subsequent CDE amplifier products.