European Space Agency

DELOS

Objectives

Market analyses predict an annual growth rate 50-80% p.a. over the next years for the two-way DVB-RCS VSAT industry. This growth shall change the market share of DVB-RCS based solutions from about 5% as of today to over 20% by the year 2008. The project DELOS targets this market with the development of the IP-core (see Fig.1) and focuses on the following objectives:

  • Develop a single, generic architectural component to host the protocol part of the DVB-RCS terminal functionality,
  • Enable the easy integration of DELOS on any kind of Integrated Circuits,
  • Minimize DVB-RCS terminal development and manufacturing cycle and costs,
  • Ensure maximum compatibility with existing and future hardware and software designs,
  • Enable openness of the architecture and allow re-use of existing ready-made components,
  • Enhance overall terminal performance,
  • Ensure terminal interoperability,
  • Take into account compatibility with actual and future DVB-RCS specifications.

Figure 1: DELOS IP-core positioning and general architecture

 click for larger image

Challenges

The majority of VSAT vendors (standards-based and proprietary) agree that there are two key needs to be addressed for further success:

  • Price reductions, and
  • Interoperability

Currently there is little difference in performance and price between proprietary and standards-based solutions. Additionally DVB-RCS solutions are not wholly interoperable today and customers are in essence locked into one vendor. Therefore DELOS will penetrate the terminal market through a scalable, interoperable, re-usable and low cost, DVB-RCS core component that will allow proliferation of manufacturers and minimise development cycles and costs with direct consequence on end-product price reduction, while ensuring improved performance.

Benefits

The intended approach of the project relies on the innovative IP-core form of the delivered terminal protocol stack functionality that will greatly assist terminals scalability and development cycle minimization, ensure communications quality and widespread DVB-RCS systems development among manufacturers. Within this scene, the proposed solution offers an excellent opportunity to accelerate DVB-RCS market growth and remove any technological incompatibilities by providing a single architectural solution in the form of parametrical library, exhibiting the following advantages:

  1. Portability: The IP-core will be designed according to the principles of system-on-chip architectures in a technology agnostic fashion to be easily ported on any chip technology (whether monolithic or re-programmable).
  2. Integration: The IP core will supply the most commonly used user and control interfaces for seamless integration within larger designs.
  3. Interoperability: The use of a CPU core will allow implementation of generic system reconfiguration, even at protocols level, offering thus maximum flexibility in incorporating future extensions of the standard.

The anticipated success of the project will enable system manufacturers to avoid design contingencies in the development of DVB-RCS communication sub-systems, thus shortening the time-to-market of respective products, reducing manufacturing costs and ensuring communication quality by preserving compatibility and interoperability to the future DVB-RCS specifications.

Features

The DELOS product will be a single, generic architectural component, designed in the form of a system-on-a-chip (SoC) IP-core suitable to be integrated on any kind of re-programmable (e.g. FPGA), or monolithic (e.g. ASIC) ICs. It will include the following features:

  • Both MPEG and ATM DVB-RCS protocol stacks operation,
  • Complete signalling and user traffic procedures,
  • A set of generic hardware interfaces to allow integration of the IP-core within terminal designs,
  • A set of generic software interfaces to allow integration of customer specific user functions on top of the DVB-RCS protocol stack,
  • A CPU core to host DVB-RCS protocol stacks,
  • A set of configuration and re-programming options to implement control of the IP-core software/hardware functions by external user devices,
  • A Linux based RTOS for maximum protocols compatibility with IP stack implementations and accessibility to a wealth of existing software,
  • Re-programmable memory space for future expandability of protocol stacks and implementation of vendor specific functions.

DELOS will deliver the aforementioned logic in a single architectural component consisting of hardware (see Fig.2) and software (see Fig.3) sub-systems and will be made available to DVB-RCS manufacturers as parametric library in order to assist rapid deployment of DVB-RCS terminals on the market with minimal design effort and implementation costs.

 

To ensure maximum compatibility with existing designs, the hardware part of the IP-core will be developed using standard VHDL, whereas internal protocols and stack architecture will be developed in standard C language. In addition, use of Linux OS will guarantee openness of the whole architecture, ensure product viability and allow re-use of ready-made components, such as drivers and IP protocol, in implementation phase.

Figure 2: Internal ar

Plan

The project will evolve within an 18-month framework organized in 6 WPs, whereby the management, technological and commercial activities are divided as follows:

  • WP1000: Project Co-ordination & management
  • WP2000: IP-core requirements & specification
  • WP3000: Hardware platform design and development
  • WP4000: Software platform design and development
  • WP5000: Integration, validation & demonstration
  • WP6000: Market Assessment & Exploitation Activities

The major milestones of the project have been assigned in accordance with AO/1-4852/05/NL/US SoW guidelines to meetings (BDR, MTR, FR) in the context of which the project's right technical and commercial orientation will be reviewed.

Current status

The project started on January 2006. The work was successfully completed on June 2007 and the project officially concluded with the Final Review which took place on the 26th July 2007.

Status date

Wednesday, May 28, 2008 - 15:20