Development of Ge-based Substrates enabling High Voltage Integrated Multi-Junction Modules


The overall aim of this activity is the development of thin Ge based substrates for the fabrication of high-voltage integrated multi-junction solar cell modules.


In order to achieve this aim, the following objectives shall need to be met:

  • Development of Ge substrates bonded to a surrogate carrier, suitable for MOCVD processing of high efficiency solar cells
  • Demonstration of thinning of Ge substrates (attached to a surrogate carrier) to approximately 20µm
  • Demonstration of MOCVD growth of GaAs on Ge on a surrogate carrier
  • Demonstration of integrated interconnections in a photovoltaic module compatible with thin III-V technology
  • Demonstration of attachment of a coverglass, which is capable of acting as a superstrate, to the module and recycling of the surrogate carrier from the module
  • Demonstration by test of the feasibility of the high voltage module from 50V up to 400V under worst case plasma conditions in space

All technology used be shown to be compatible with the manufacture of GaInP/GaAs/Ge triple junction solar cells, even though the manufacture of these devices is not explicitly required during this project.


  • Bonding of Ge substrate to temporary carrier
  • Thinning down of 4" Ge-substrate to 20 µm such that it enables MOCVD growth of GaAs
  • Release of carrier substrate
  • Monolithic high-voltage module processing


High-voltage module

  • Interconnections protected from plasma arcing by coverglass
  • Lower currents resulting in minimized resistive losses (reduced wiring mass) and reduced potential arcing damage
  • Compatible with established solar array structure and with high-efficiency MJ technology
  • Inherent arcing protection results in better compatibility with electric propulsion system (ion thruster)

Low-weight solar cell

  • Superior power/mass ratio compared with current multiple junction cells
  • Superior launch cost/power ratio compared with current multiple junction cells, without substantial increase of cell cost


The main objective of this project will be the interconnection of multiple solar cells on a wafer, as well as the integration of shunt diodes, by using edge wrap-around contacts.
This results in the realisation of high-voltage micro-modules, by wafer-scale interconnected cells (MIMOWIC) which are to be attached to a flexible transparent substrate. This also allows the development of fully new module approaches, competing with other thin-film technologies on flexible substrates. Moreover, the MIMOWIC's enhanced output voltage could strongly reduce the maximum current flowing through a string, while offering a good inherent protection against the occurrence of arcing phenomena.

click for larger image


In the first phase of the project (01/09/2003 - 31/08/2004) the following work packages will be carried out:


WP 1:    Minimal Thickness Ge Wafer
WP 2:    Wafer Bonding to Carrier
WP 3:    Bonded Wafer Thinning + GaAs MOCVD growth
WP 5.1: Optimisation of individual process steps for micromodule realisation
WP 6.1: Coupon of micromodules: design


In the second phase of the project (01/09/2004 - 31/08/2005) the following work packages will be completed:


WP 4:    Solar cell realisation on Ge Foil
WP 5.2: Micro-Module Realisation on flexible glass
WP 6.2: Coupon of micromodules: realisation + testing

Current status

Test coupons were fabricated using 20µm dummy micromodule structures. In-plane interconnect welding as well as lay-down on the honeycomb mini-panels could be completed successfully by EADS Astrium. ESD tests at Onera on this test coupon showed that:

  • The technology that was tested at this level (dummy sample) was shown to be free of primary arcs up to -250 Volts,
  • The first threshold for primary arcs was recorded at -300 Volts,
  • This threshold level was clearly surpassed at -350 Volts, where several discharges per minute were measured. However, visual inspection of the coupon after test up to -350V did not reveal any apparent damage.

No problems were reported with the in-plane interconnections after thermal cycling at EADS Astrium. 2 modules withstood the test successfully, for 1 module 2 new cracks were observed as a result of the 2000 GEO thermal cycles.

Regarding the bonding/release experiments, it was shown that the use of substrates with a barrier coating on both sides resulted in a better bonding quality than obtained previously on substrates with the coating present only on the bonded surface. However, thus far no solution has been found that offers a uniform, fast release by making effective use of the trenches. All experimental data from the past experiments will be collected and provided to ESA. Along with the documentation the team will prepare a roadmap describing, based on the findings from the present contract, the new technologies that would need to be developed in order to enable the realization of the 20µm Ge substrate technology.


Status date

Wednesday, February 6, 2013 - 11:03