European Space Agency

DVB-CIDD -Verification campaign of the DVB Carrier-ID detection and demodulation


Antwerp space won the ESA ITT for DVB Carrier ID Detection and Demodulation (DVB-CIDD) and kicked-of the project in July 2016. Alongside the existing activity with ESA for on-board Spectrum Monitoring (OBSM), this new project forms an important additional thread towards the development of a fully featured on-board interference detection and reporting system.

Industry recently standardized on DVB-CID with the purpose of detecting the presence of unintentional sources of interference. One of the main sources of service interruptions in broadcasting or professional communication links, is the presence of unintentional interferers, which are accidentally transmitting towards another transponder e.g. erroneous dish pointing or broken BUC (block up-converter) sweeping in frequency. The DVB-CID consists in a spread-spectrum signal to be transmitted by all new satellite modulator equipment in order to allow their identification.

In this project Antwerp Space will implement the required receiver technologies to detect multiple DVB-CID signals and verify the effectiveness of current technologies in various realistic interference scenarios. The activity will enhance and improve the capability for detecting the presence of unwanted transmitter signatures.

The activity includes defining the typical scenarios of disrupted RF channels. These scenarios will be used to determine the requirements of the DVB-CID demodulator techniques, followed by a hardware implementation of a prototype receiver that is able to detect the interfering signals.

Finally, the activity also includes a laboratory demonstration of the effectiveness of the developed technology in the DVB-CID receiver to meet the challenges of typical satellite scenarios with unintentional jammers.

The project is expected to conclude by mid-2018.


Significant challenges exist in meeting the technically demanding requirements for an on-board system suitable for Fixed Satellite Services (FSS) or Broadcasting Satellite Services (BSS) in Geostationary Earth Orbit (GEO). Some of these include;

  • Detection and demodulation of the CID hidden in the transponder noise spectrum and positioned at an unknown frequency (blind detection)
  • To not demodulate the incoming carrier itself
  • Low-power and mass using single-FPGA solution
  • CID is encoded using Spread Spectrum (SS) technique with spectral width of 112 kHz or 224 kHz
  • CID is located at ±220 Hz spaced from carrier centre frequency
  • Power spectral density level dependent on host carrier symbol rate, between 17.5 dB - 27.5 dB lower than the host carrier power spectral density
  • Doppler effect interference with the blind demodulation


The verification campaign provides an in-orbit tool for the detection and demodulation of all carrier identifiers (Carrier IDs) that are present in the incoming spectrum, without using a priori known information (blind demodulation).

These techniques allow for very efficient sampling and processing of the uplink beam to determine where two or more signals collide within the same channel. Very fast analysis of these signals identifying the CID means the information can be returned directly to the operator, from where it can be processed extremely quickly to shut down the interference source.  

As an on-board system this should substantially improve the performance of interference mitigation over current ground systems. The success rate for detection and demodulation are greatly improved due to the best possible signal-to-noise conditions, which are unaffected by most of the satellite transponder distortions, and before the atmospheric perturbations in the signal downlink path.

By implementing this algorithm as a software-defined-radio, the system offers optimum flexibility for future evolutions of the algorithms and/or the CID standard over the lifetime of the spacecraft.

Because of the compact size and limited weight, the system is easy to integrate with almost any satellite.


The CID Detection and Demodulation system has the potential to be used in any device in the uplink or downlink path that utilizes the DVB-S or DVB-S2 standard. Primarily, it is developed for space missions but due to its high flexibility the opportunity exists for it to be feasibly integrated in to ground based modulators and demodulators (though with significantly less performance).

The DVB-CIDD receiver is able to process single or multiple bands if a satellite is equipped with multiple antenna operating on different frequencies within the same spectrum. If required it can autonomously perform scheduled tasks, which can be controlled from ground station. The system is designed to be compliant with standard interfaces such as SpaceWire or CAN and is fully compatible with the ETSI DVB-CID standard.

System Architecture

The test bench comprises four DVB-S2 modulators combined to simulate different interference scenarios. The signal and noise amplitude levels are adjusted to simulate a satellite environment. Because both the modulator signal output and the prototype DVB-CIDD receiver input are situated in the L-band frequency region, no frequency conversion is implemented. The DVB-CIDD intermediate frequency chain consists of filtering and amplification blocks and a conversion from the analogue to digital domain. The detection algorithm will be applied in an FPGA, to make the system flexible for future changes in algorithm and/or DVB-CID standard. Finally, the FPGA interconnects with a PC that synchronizes with the modulators and the test routine database.


The work is organized in four main tasks:

  • Task 1: System definition
  • Task 2: Receiver design
  • Task 3: CID prototype receiver implementation
  • Task 4: Demonstration 

ESA reviews are held to close each main task.

Current status

The project is currently implemented as far as the kick-off for task 3. This means that activities are completed with respect to the publication of the SOTA report examining technologies, techniques and methods for developing suitable algorithm to perform the complex functions demanded of the product. Additionally, the best scenarios to validate the system against have been researched and trade-offs performed against various hardware architectures as candidates for the flight receiver design. The outcomes of these activities have also been turned into architectures for the implementation of the prototype receiver and test bench.

Status date

Wednesday, October 25, 2017 - 07:18