RFIC Chip and Phased Array Antenna Demonstrator - Ku band RFIC and Phased Array Antenna Demonstrator

Objectives

This project covers the development of true time delay digital beam former demonstrator with 64 antenna elements operating in Ku band.

The demonstrator will have 4 main parts – Satellite Modem, Digital beam former ASIC, Ku band RFIC & Antenna elements. Ku band RFIC, antenna elements and Integrating the 4 main parts are the focus of this project. 

Challenges

The key challenge is to come up with low-cost, low-power, high-performance modular design that is scalable. Other significant challenges are generating & distributing LO, integrating Beat RFIC & antenna elements on PCB and the cost-effective antenna design.

Benefits

Ku band RFIC is designed to be highly configurable for receive and transmit operation and it supports handling same frequency across 4 antenna elements. Along with its automatic linear polarization control and low power capability, this design lends itself to be scalable to support very small to very large antenna elements. 

In order to reduce the overall physical size of the antenna terminal, the antenna itself has been designed as a single-panel terminal instead of the traditional dual-panel terminal approach, where one panel is the transmit aperture and the second panel the receive aperture. Each antenna element of the antenna array can operate on both transmit and receive frequency bands. Additionally, the elements are self-diplexing antennas, i.e., antenna elements with independent feeding points for both frequency bands and with polarization agility. 

Final assembled prototype with a satellite modem, the digital beam former (Prime), Ku band RFIC (Beat) and antenna element will be low-cost, low-power and support bi-directional data transfer using DVB-S2 in the forward link and S-M2M in the reverse link. 

Features

IoT demonstrator terminal will integrate satellite modem ASIC along with digital beam former ASIC(Prime), Ku band RFIC (Beat) and antenna elements in small form factor PCB. The product will support single beam with 64 antenna elements and supports a bandwidth of up to 10Mhz. The product will support DVB-S2 VL-SNR waveform in the forward link and S-M2M in the reverse link. Sensor interface could be added to meet the market needs.

System Architecture

RFIC (Beat) is an analog transceiver that converts baseband (IQ) from the digital beam forming ASIC (Prime) to Ku band antenna panel and vice versa. Each Beat RFIC has 4 IQ transceivers and can connect to 4 antenna elements. We can increase the number of Beat RFIC chip as per the number of antenna elements making the architecture modular and scalable. In the below diagram we see single digital beam forming chip (Prime) supporting 8 Beat chip that connects to 32 antenna elements. Flexibility is also available in configuring all 32 antenna elements as Rx only or Tx only or split them as 16 for Rx & 16 for Tx. 

For the IOT demonstrator, 2 Prime chips with 16 Beat RFIC chips (Ku band) and 64 antenna elements are planned to be integrated along with one satellite modem ASIC.

Plan

The project is planned in 2 phases.

Phase-1 is focused on achieving Tape Out of the RFIC Chip. There are 3 milestones in this phase-1. 

Phase-2 is focused on validation of the chip and the demonstrator hardware.

Current status

The project has reached RevA0 RFIC Tape-Out design review Milestone. System architecture and RFIC requirements are completed. 

Contacts

ESA Contacts

Status date

Tuesday, November 28, 2017 - 10:21