The hardware and software allows characterisation of all VDES satellite uplink elements.
The CDMA demodulator works at Ec/N0 of -13 dB, and the VDES draft standard had to be changed.
There is no similar equipment available from other sources. The global system software simulator works at a packet level and runs much faster than real time.
Can be used to test VDES uplink transmitters and satellite receivers. System performance such as throughput, latency and success rates can be optimised for a very wide range of conditions/assumptions.
The system is split into software simulation of packet level performance and a separate Physical Layer module.
Hardware and SDR waveform generation is used to generate real life signals.
The milestones are KO, BDR, PDR, CDR, TRR and FR.
The project achieved TRR in December 2017.