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StatusCompleted
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Status date2019-01-02
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Activity Code4F.105
CESI project was aimed at developing of high efficiency large area solar cells from 6” Ge wafers moving towards maturity and reaching TRL 4.
The main objective of this project has been the development of a large area solar cell, named CTJ30-CLASS, starting from the CESI standard product developed on 4’’ technology, named CTJ-30. In particular, to obtain large area solar cells with BOL and EOL electrical performances in line with standard CTJ-30 cells the following activities have been carried out:
Development, optimisation and implementation of all the processes for the manufacturing of large area solar cells on 6” wafers (i.e. epitaxy, post-growth, and solar cell assembly processes);
Preliminary qualification at bare cell level based on the ECSS-E-ST20-08C Rev1 standard.
In parallel to these two main tasks, an R&D activity aimed to develop an integral by-pass diode for reverse bias protection has been also carried out.
During the development of the activities the technical risks was low/moderate. The attention was maintained on a few criticalities that were considered as possibly affecting the final outcome. Table below shows the results and, where applicable, the mitigation approach followed.
| Risk | Results |
| Problem in calibration and uniformity of the MOCVD epigrowth on 6” substrate | No criticality observed, MOCVD growth was optimized for 6” wafers |
| Thinning process not uniform or reproducible | No critically observed, the thinning process is uniform and reproducible |
| Problem with photolithography process | No criticality observed, the photolithographic step was optimized for 6” wafers |
| Mechanical breakages | No criticality, breakages in line with 4” technology |
| Thermal stress during the sintering and wafer bending | No criticality observed, thermal stress and bending in line with 4” processes |
| Development of internal diode | Criticality: the modelled low voltage by-pass integral diode has a too high series resistance- Mitigation: The integral diode developed is using the full structure (*). |
| Compatibility with standard assembly process | No criticality observed, the welding and coverglassing processes have been optimized for the large area solar cells. |
The outcome of this project is expected to be beneficial to the Italian and European Industry competitiveness, as it meets the relevant EU policy promoting the competitiveness, non-dependence and innovation of the European space sector.
The CESI project comes at the right time in order to keep up with the similar initiatives taken by the competitors. The CTJ30-CLASS solar cells are meant to be used by solar cells assembly manufacturers working in the field of space application, especially for Telecom satellites and in general for high power demanding missions.
The CESI new Large area solar cells lead to a significant benefit at space power generators level, as they reduce, for a given power, the number of components required and hence the complexity of the panel, with consequent saving of space and weight.
The main Features & Characteristics of the CTJ30-CLASS are:
- Triple junction solar cell InGaP/InGaAs/Ge for space applications
- Avg. Efficiency 28.5 %
- Polarity N on P
- cell mass 145 -150 mg/cm2
- Thickness 170 μm ± 20 μm
- External By-pass diode for reverse bias protection
- Weldable Contacts, Front and Back, based on gold coated silver layers.
- Standard sizes available 6x12 cm2 (active area 68.6 cm2)
- High Radiation Resistance (RPF=0.9 @ 5E14 electron/cm2 ,1 MeV electron)
- Good mechanical strength
CESI project was aimed at developing a process for manufacturing very large area solar cells (CTJ30-CLASS), with an innovative by-pass diode. The product to be developed is a triple junction solar cell InGaP/InGaAs/Ge with efficiency class 29%, characterized by an area of about 70 cm2 (≥ 68 cm2) and thickness in the range of 180 µm , thanks to the use of 6” germanium substrate.
The project was operatively structured in one phase with three technical Tasks:
- Task 1: Development and implementation of the processes for the manufacturing of large area solar cells from 6” wafers.
- Task 2: Large Area solar cells preliminary characterisation and reliability evaluation based on the ESA ECSS-E-ST20-08C Rev1 standard.
- Task 3: Development of an internal by-pass diode for large solar cells
The development of CTJ30 CLASS large area solar cells was successfully completed. All the process steps for the manufacturing of bare solar cells were optimized and suitably transferred from 4” to 6” technology.
A lot of CTJ30_CLASS solar cells was manufactured with size 6x12 cm2 and the testing confirmed that the electrical performances of these samples are in line with the CTJ30 technology in view of the similar epitaxial structure.
In addition, the large area solar cell assembly process was investigated and optimized to demonstrate that the CTJ30-CLASS devices are suitable for standard welding and coverglassing techniques.
The test results on the pre-qualification lot of large area cells show that not only BOL electrical performances but also reliability features are comparable with the standard CTJ30 solar cell despite the different solar cell area.
The prequalification test campaign demonstrated that these cells have reached a TRL of 4.
A future project is envisaged for the industrialization and qualification of the CESI large area solar cells.
