SIMO – (Sige Iq MOdulator) -Broadband SiGe IQ-Modulator

Objectives

The project objective is to demonstrate the feasibility of a wideband IQ-modulator based on SiGe HBT technology, which can be used in ground-segment equipment up to Ka-band. The project activities include the design, manufacturing, and testing of a SiGe MMIC satisfying functional and state of art performance requirements.

As essential part of a direct Modulator design this MIMC allows to extend to almost 5 octaves the frequency output band, compared to COTS components that almost cover only two octaves in a similar band of interest.

Challenges

Nowadays no commercial part numbers are available to cover the ESA specified bandwidth from 1 GHz to up to at least 30 GHz with a wide modulation bandwidth (min. 500 MHz) and a high linearity. Direct conversion modulators in C band and in the lowest portion of Ka band (up to 23 GHz) are sold by manufacturers as separate parts, SIMO shall extend the bandwidth capability up to the whole Ka band, while at the same time include also L to C-band functionality

Benefits

SIMO allows a new generation of direct conversion transmitter from 1GHz up to 30 GHz thus extending TX functionality both to lower and higher frequencies.

Additionally, SIMO targets low power consumption  in the order of 0.5W. 

Features

SIMO is a wideband direct conversion IQ modulator. An OIP3 of 20 dBm as well as a sideband suppression  of 30 dB in typical conditions allows at the same time, good linearity. An additional internal and by-passable frequency doubler is foreseen to ease SIMO integration into high frequency PCBs, or hybrids with no need of complex waveguide MMIC external structures for the LO feeding in the Ka band.

 

System Architecture

The functionality is obtained using two core mixer cells operating with a quadrature Local Oscillator signal and then summed-up. Each core cell is based on a differential Gilbert cell. The quadrature Local Oscillator signal generation section is based on a bank of four arms passive quadrature shifter so to cover, with overlapping bandwidth, the entire frequency working range. Each passive quadrature shifter is based on a 3 stage cascaded RC polyphase network. In order to limit phase and amplitude unbalances SIMO employs a well-balanced differential architecture as well as layout symmetry is adopted whenever possible.

Plan

The project plan is divided into 5 tasks:

  1. Finalized Technical requirements: Establish a complete and self-consistent set of technical requirements for the development;
  2. MMIC design: Design the MMIC to meet the technical specifications, and Test Plan definition;
  3. MMIC Hardware: Manufacture and assembly of the MMIC;
  4. Performance Validation: Perform the validation tests and verification of the prototype;
  5. Overall Evaluation: Perform an overall evaluation of the outcome of the activity and future applications;

Two milestones are foreseen:

  • MS1 Progress Milestone at the end of Task2 by June 2018
  • MS2 Final settlement at February 2019.

Current status

The work is currently in progress.

Contacts

ESA Contacts

Status date

Thursday, May 17, 2018 - 07:11