The objective of the project is to develop and implement a demonstrator for DVB-S2X wideband transmission links supporting baud rates up to 1.4 Gsps. The following modules are included in the demonstrator:
- DVB-S2X transmitter
- Wideband channel emulator
- DVB-S2X receiver
The demonstrator supports user bit rates up to 5.6 Gbps for 16APSK modulation, while the design is prepared for higher order modulation and higher user bit rates.
The main challenges in the project is the high baud rate, the high bandwidth and the high user data rate.
The DVB-S2X modem that is developed in this project supports significantly higher baud rates and larger bandwidths than any other commercially available products, and demonstrators, available in 2018. The modem will allow more efficient use of wideband links where a single DVB-S2X carrier now can be used in place of multiple 250-500 MHz DVB-S2X carriers.
- Baud rates from 25 Msps to 1400 Msps
- On-the-fly adjustable baud rate
- Adaptive Coding and Modulation (ACM)
- Powerful, flexible and module-based hardware platform where FPGA, DAC, and ADC modules can be upgraded separately
- Fully in-field reprogrammable modem where algorithms and air interface can be updated
- Fixed equalizer (pre-whitening) in transmitter
- Equalizer in receiver
- Novel FEC decoder design supporting up to 6 Gbps user bit rate in a single FEC decoder core
- Demonstrator includes wideband (1500 MHz) channel simulator
The duration of the project is 24 months.
- The System Requirement Review (SRR) is planned for September 2018,
- The Critical Design Review (CDR) is planned for June 2019,
- The Test Readiness Review (TRR) is planned for December 2019, and the Final Review (FR) is planned for June 2020.
The modem design has been completed and the modem hardware has been manufactured, verified and is available in the lab. Currently the modem firmware and software implementation is ongoing (80% completed).
The next milestone is the Test Readiness Review (TRR).